What's New in Astrobe for RISC5

Version 6.4.0 2006-2018 CFB Software
Last Updated 3 Jun 2018 

E-Mail:   info@cfbsoftware.com
Website:   http://www.astrobe.com

This version is supported on Windows 10. The Installation and Uninstall executables are now digitally signed to validate authenticity and integrity.

A summary of new features introduced in Astrobe for RISC5 since version 6.2:

Project Oberon Language and Compiler Compatibility

The latest version of the Oberon Language Report is dated May 2016.  A copy of the report is included in the Astrobe distribution.

The Astrobe Oberon for RISC5 compiler has been updated to be compatible with the most recent (23 Sep 2017) Project Oberon FPGA RISC5 compiler sources available at this time.


Oberon for ARM Cortex-M Compiler Compatibility

The Astrobe Oberon for ARM Cortex-M3, M4 and M7 compilers include a number of Oberon language extensions. These have now been implemented in the Astrobe Oberon for RISC5 compiler to simplify porting of source code between the systems.


Supported FPGA Development Boards

Embedded Project Oberon has now been implemented on a number of inexpensive FPGA development boards using Xilinx Spartan-6, Spartan-7 and Artix-7 devices. All of these boards are currently in production and available for sale directly from the manufacturers. More details and useful links are included in a table on the Astrobe website.


RISC5 Implementation

Verilog Sources

The Verilog sources for the supported target devices have been updated to incorporate the latest Project Oberon changes (dated 16 Nov 2016).  

Instruction Set Extensions

The instruction set used by Embedded Project Oberon includes an extension of the RISC5 Branch Conditional instruction. This extension was introduced to allow the efficient implementation of the numeric CASE statement which is absent from Project Oberon.

The standard Branch Conditional via Register instruction is

BR,cond [Rn]

The new variant of this instruction is

BR,cond PC,[Rn]

i.e. the target of the branch is computed by adding the contents of register n to the current program counter.

As a result, the average overhead of any selection in a CASE statement, including range checking, is now a constant 6 instructions. The average overhead of any selection in an IF THEN ELSE statement is (N + 1) * 2 instructions. Hence, in situations where there is an equal probability of each selection occurring, CASE is faster than IF whenever there are more than 2 choices.


New Library Modules and Functions

RTC

The modules RTC and SPI1 contain functions which provide support in RISC5 Project Oberon for the Maxim DS3234 Real-Time Clock device. The DS3234 is a battery-backed chip that provides continuous time (hours, minutes and seconds) and date (year, month and day) information accurate to +/- 2 minutes per year via an SPI interface. As well as providing the ability to automatically timestamp Project Oberon files it can be used with the Astrobe HCFiler filesystem functions to implement accurate datalogging applications.

The RTC device is available as a convenient Deadon RTC breakout board from SparkFun.

HCFiler

HCFiler was developed for Embedded Project Oberon to be used for applications (e.g. data logging, backups etc.) that might need to create files with a total size exceeding the 64 MB limit of the standard Project Oberon SD card filesystem. The files can subsequently be processed / analysed on a Windows system.

Kernel

If a functioning RTC device is detected at system startup time the new Kernel procedures InstallClock and InstallSetClock are used to assign RTC.Clock and RTC.SetClock to the corresponding Kernel procedure variables. Any calls to Kernel.Clock then return the time retrieved from the RTC device. Hence, files subsequently created by Embedded Project Oberon are correctly timestamped.


Source Code Examples

New source code examples include:


Problems fixed

v6.4.0