Search found 11 matches
- Sun Jul 13, 2014 5:01 pm
- Forum: LPC2000
- Topic: Buffered UART Routines
- Replies: 5
- Views: 71857
Re: Buffered UART Routines
For three years, I found some errors and corrected them. I updated my previous post.
- Mon Sep 30, 2013 8:09 am
- Forum: LPC2000
- Topic: CRC-16 CCITT calculation (8408H polynom)
- Replies: 0
- Views: 19442
CRC-16 CCITT calculation (8408H polynom)
MODULE CRC16CCITT8408; (* A. V. Shiryaev, 2013.09 http://ru.wikipedia.org/wiki/%D0%A6%D0%B8%D0%BA%D0%BB%D0%B8%D1%87%D0%B5%D1%81%D0%BA%D0%B8%D0%B9_%D0%B8%D0%B7%D0%B1%D1%8B%D1%82%D0%BE%D1%87%D0%BD%D1%8B%D0%B9_%D0%BA%D0%BE%D0%B4 *) IMPORT SYSTEM; CONST init* = 0FFFFH; (* Name: CRC-16 CCITT Poly: $8408...
- Wed Jan 16, 2013 5:07 pm
- Forum: Getting Started
- Topic: Ethernet code
- Replies: 7
- Views: 231048
Re: Ethernet code
If you need Ethernet, it is not difficult. See EasyWEB sources for example.
If you need TCP, it is more complicated.
If you need TCP, it is more complicated.
- Mon Oct 29, 2012 2:04 pm
- Forum: Cortex-M0, M3, M4 and M7
- Topic: Generating a MD5-Hash
- Replies: 3
- Views: 138235
Re: Generating a MD5-Hash
However, I believe that 4GLCoder deliberatly didn't use NEW to avoid exhausting the heap (there is no automatic garbage collection). POINTER TO RECORD not required here. Context may be of RECORD type. I updated my previous post. As you can see, Context not marked for export, but the following test ...
- Mon Oct 29, 2012 2:55 am
- Forum: Cortex-M0, M3, M4 and M7
- Topic: Generating a MD5-Hash
- Replies: 3
- Views: 138235
Re: Generating a MD5-Hash
There is my translation. MODULE MD5; (** portable *) (* ejz *) IMPORT SYSTEM; (* ETH Oberon, Copyright 2001 ETH Zuerich Institut fuer Computersysteme, ETH Zentrum, CH-8092 Zuerich. Refer to the "General ETH Oberon System Source License" contract available at: http://www.oberon.ethz.ch/ *) (** The MD...
- Wed Jun 20, 2012 6:03 pm
- Forum: LPC2000
- Topic: LPC2378 MCI driver
- Replies: 3
- Views: 44470
Re: LPC2378 MCI driver
Sample program: check declared card capacity correspond to real. CardFakeTest.mod: MODULE CardFakeTest; (* A. V. Shiryaev, 2012.06 NOTE: information stored on the card will be lost! *) IMPORT Main, SYSTEM, LPC, MCI, Out, Timer, CheckCard; VAR res: INTEGER; s0: INTEGER; (* 0 -- fast check, 1 -- compl...
- Tue Jun 19, 2012 10:03 pm
- Forum: LPC2000
- Topic: LPC2378 MCI driver
- Replies: 3
- Views: 44470
Re: LPC2378 MCI driver
Some refinement. DMA controller has some "feature". On intensive peripherial access (such as REPEAT UNTIL SYSTEM.BIT(LPC.U0LSR, 5), Timer.MSecDelay etc.) after StartWrite/StartRead (i.e. when MCI.Busy()), DMA controller does not have time to work. This leads to MCI errors txUnderrun/rxOverrun. In th...
- Sun Jun 10, 2012 9:04 am
- Forum: LPC2000
- Topic: LPC2378 MCI driver
- Replies: 3
- Views: 44470
Re: LPC2378 MCI driver
There is some mistakes. I forgot to put the brackets :( MCI.mod: SYSTEM.PUT(LPC2378.MCIDataTimer, blocks * 100 * rate DIV 1000) => SYSTEM.PUT(LPC2378.MCIDataTimer, blocks * 100 * (rate DIV 1000)) SYSTEM.PUT(LPC2378.MCIDataTimer, blocks * 300 * rate DIV 1000) => SYSTEM.PUT(LPC2378.MCIDataTimer, block...
- Tue May 08, 2012 5:56 pm
- Forum: LPC2000
- Topic: LPC2378 MCI driver
- Replies: 3
- Views: 44470
LPC2378 MCI driver
MCI.def: DEFINITION MODULE MCI; CONST (* card types *) cardTypeUnknown* = 0; cardTypeMMC* = 1; cardTypeSD* = 2; cardTypeSDHC* = 3; writeBlocksAdr* = 7FD00000H; writeBlocksLen* = 8192; (* B *) readBlocksAdr* = 7FD00000H; readBlocksLen* = 8192; (* B *) blockLen* = 512; (* B *) (* err codes *) errOk* =...
- Wed Apr 06, 2011 8:31 pm
- Forum: LPC2000
- Topic: Buffered UART Routines
- Replies: 5
- Views: 71857
Re: Buffered UART Routines
DEFINITION MODULE Port0; PROCEDURE Init* (baud, parity: INTEGER); PROCEDURE Write* (adr: INTEGER; n: INTEGER; VAR done: INTEGER); PROCEDURE Read* (adr: INTEGER; n: INTEGER; VAR done: INTEGER); END Port0. MODULE Port0; (* A. V. Shiryaev, 2009.12, 2011.04, 2012.06, 2014.06 LPC2378 UART0 ASSERTs: 100....