Search found 33 matches
- Mon Dec 11, 2023 8:21 pm
- Forum: Bug Reports
- Topic: SYSTEM.LNK Issue
- Replies: 1
- Views: 1848
SYSTEM.LNK Issue
Incorrect code is generated when SYSTEM.SP is used as a parameter to BITS e.g. IF 2 IN BITS(SYSTEM.SP) THEN . 8 08H 02004H movs r0,#4 . 10 0AH 04201H tst r1,r0 . 12 0CH 0468DH mov sp,r1 it should be something like: IF 2 IN BITS(SYSTEM.SP) THEN . 8 08H 04668H mov r0,sp . 10 0AH 02104H movs r1,#4 . 12...
- Thu Nov 16, 2023 4:06 am
- Forum: Astrobe for ARM Cortex-M0, M3, M4 and M7
- Topic: Module initialisation order?
- Replies: 1
- Views: 4869
Re: Module initialisation order?
Yes. If you have the Professional Edition you can confirm the order of module initialsation by disassembling the application and looking at the sequence of <modulename>..init calls in the initialisation code procedure (e.g. Blinker..init) of your application.
- Thu Nov 16, 2023 3:56 am
- Forum: Astrobe for ARM Cortex-M0, M3, M4 and M7
- Topic: Module initialisation order?
- Replies: 1
- Views: 4869
Module initialisation order?
Does the module list in the 'map' file for a linked program represent their initialisation order, top to bottom?
- Thu Nov 16, 2023 3:54 am
- Forum: Bug Reports
- Topic: Stack Trace option disabled?
- Replies: 1
- Views: 1677
Re: Stack Trace option disabled?
The information in the Astrobe for Cortex-M0 Help file is incorrect. The Stack Trace option is not disabled. The warning in the Help file for the Stack Trace option should instead say: NOTE: Select Project > Rebuild from the main menu to rebuild applications after this setting is changed to ensure t...
- Thu Nov 16, 2023 3:50 am
- Forum: Bug Reports
- Topic: Stack Trace option disabled?
- Replies: 1
- Views: 1677
Stack Trace option disabled?
The Astrobe manual says about option "Stack Trace": "In Astrobe for Cortex-M0 this checkbox is disabled. The option is ticked by default and cannot be changed." However, I can deselect the option. At some point I got a linker error message "Inconsistent Stack Trace setting: ...". Selecting the optio...
- Thu Nov 16, 2023 2:03 am
- Forum: Bug Reports
- Topic: Register r12 stacked on exception, not r11?
- Replies: 1
- Views: 1761
Re: Register r12 stacked on exception, not r11?
Thank you for letting us know. Yes - that is an error in Astrobe for Cortex-M0, M3, M4 and M7 which will be fixed in the next release. In the meantime, you can fix the problem by changing "r11" to "r12" in the procedure OutStackItem in the library module Traps.
- Thu Nov 16, 2023 1:57 am
- Forum: Bug Reports
- Topic: Register r12 stacked on exception, not r11?
- Replies: 1
- Views: 1761
Register r12 stacked on exception, not r11?
According to the MO docs, R12 gets stacked with an exception, but module Traps prints "r11". I think it should be "r12" if I read the code correctly, and if the docs are accurate.
- Tue Feb 22, 2022 11:02 pm
- Forum: CPIde and Component Pascal
- Topic: GPCP Unhandled Exception
- Replies: 3
- Views: 9849
GPCP Unhandled Exception
I have installed Component Pascal and CPIde on my Windows 10 laptop. When I try to compile the simple "Hello World" example within CPIde I see: Unhandled Exception: System.NullReferenceException: Object reference not set to an instance of an object. at GPBinFiles.GPBinFiles.findOnPath(Char[] pathNam...
- Tue Feb 22, 2022 10:05 pm
- Forum: CPIde and Component Pascal
- Topic: Run button behaviour?
- Replies: 1
- Views: 6051
Run button behaviour?
If I compile and run an example, then load and compile a different example, the run button runs the first example, not the one that was just compiled. Closing the IDE and opening it again allows the correct example to be launched via the run button. This seems to be a persistent phenomenon.
- Mon Mar 15, 2021 8:41 pm
- Forum: Astrobe for FPGA RISC5
- Topic: RAM port connection
- Replies: 1
- Views: 9056
RAM port connection
I noticed that the port `adr` for the RAM module is 18bits, whilst it's driving signal RISC5.v is 24bits. I was hoping you could tell me how that's resolved during synthesis? Are only the 18LSB used?