Search found 60 matches

by gray
Mon Jan 20, 2020 6:46 am
Forum: Astrobe for ARM Cortex-M3, M4 and M7
Topic: Configuring Buffer Sizes
Replies: 2
Views: 2087

Re: Configuring Buffer Sizes

You are right, I had come to the same conclusion. To actually see what the type complexity entails, down to the interrupt handler and so on, I implemented the module, and it results in roughly doubling the code size: about 4k for the "complex" version, about 2k for a version along the lines you sugg...
by gray
Sat Jan 18, 2020 1:48 pm
Forum: Astrobe for ARM Cortex-M3, M4 and M7
Topic: Configuring Buffer Sizes
Replies: 2
Views: 2087

Configuring Buffer Sizes

I am struggling with an seemingly straightforward problem. I am re-implementing my channels for input and output. Channels are abstractions of actual devices, such as serials. For a buffered implementation I need, well, buffers. I would like to have different buffer sizes for the different serials i...
by gray
Wed Jan 08, 2020 1:31 pm
Forum: Astrobe for ARM Cortex-M3, M4 and M7
Topic: I2C.mod for STM32F207 issue?
Replies: 1
Views: 1840

I2C.mod for STM32F207 issue?

I think the procedure 'Read' in I2C.mod for the STM32F207 is not correct for read data > 2 bytes. Consider the "big" IF-statement, for the count > 2 case: 1) ACK should get enabled to implement the protocol as per the timing diagram in the reference manual. 2) the index 'i' into data is ahead by one...
by gray
Sat Dec 28, 2019 4:54 am
Forum: Astrobe for ARM Cortex-M3, M4 and M7
Topic: push {}
Replies: 20
Views: 12730

Re: push {}

FWIW, I enable the handlers from my Exceptions.Init, which corresponds to your Traps.Init, both called from Main.mod, ie. right before the application code starts. At this point, I can simply write to SCB_SHCSR. CONST SCB_SHCSR = MCU.NVICBase + 0D24H; MEMFAULTENA = 16; BUSFAULTENA = 17; USGFAULTENA ...
by gray
Fri Dec 27, 2019 12:11 pm
Forum: Astrobe for ARM Cortex-M3, M4 and M7
Topic: push {}
Replies: 20
Views: 12730

Re: push {}

Thanks! Which reminds me of a question I had meant to ask for some time: Traps.mod has handlers for faults such as mem fault or bus fault, but I cannot find the location where the corresponding system handlers get enabled (register SCB_SHCSR, defaults to handlers disabled). Is this by design, or do ...
by gray
Fri Dec 27, 2019 10:38 am
Forum: Astrobe for ARM Cortex-M3, M4 and M7
Topic: push {}
Replies: 20
Views: 12730

Re: push {}

In the code snippet, is id.addr still set to the same value as with the current Astrobe version, ie. the return address as pushed by the processor upon exception entry? And does the compiler/linker still write the source code line number as four byte value at the address right after the svc instruct...
by gray
Thu Dec 26, 2019 11:49 am
Forum: Astrobe for ARM Cortex-M3, M4 and M7
Topic: push {}
Replies: 20
Views: 12730

Re: push {}

The stack trace code I had described here does not work with leaf procedures. The procedure calling the leaf procedure is not detected as the leaf procedure does not create its own stack frame. I have yet been unable to come up with a solution as I fail to find a reliable method to detect a leaf pro...
by gray
Sun Oct 27, 2019 1:02 am
Forum: Astrobe for ARM Cortex-M3, M4 and M7
Topic: push {}
Replies: 20
Views: 12730

Re: push {}

In the screenshot, the disassembler does not show the Oberon source lines, while the current module-based disassembler does. Is this a functional limitation of the new disassembler, or a display option?
by gray
Tue Oct 15, 2019 7:00 am
Forum: Astrobe for ARM Cortex-M3, M4 and M7
Topic: push {}
Replies: 20
Views: 12730

Re: push {}

Oh, the disassembler looks nice and very, very useful. Do you have an ETA for the new Astrobe version? Question regarding the stack trace: so there's no way of getting the procedure names? Address and line number is useful, so I am not complaining, but also having the procedure name right in the out...
by gray
Wed Jun 19, 2019 12:36 pm
Forum: Astrobe for ARM Cortex-M3, M4 and M7
Topic: SYSTEM Extensions
Replies: 1
Views: 2732

SYSTEM Extensions

Astrobe's SYSTEM offers easy access to the PC, LNK, SP, and FP registers, both readable and writable, which is very -- very! -- useful to muck around with separate stacks for each process, exception handling (errors, faults), and other low level code of that nature. To separate the process stacks (t...