Search found 2 matches
- Tue Jun 03, 2025 1:34 pm
- Forum: Astrobe for FPGA RISC5
- Topic: Nexys board RAM interface
- Replies: 3
- Views: 30597
Re: Nexys board RAM interface
Okay, found it in Project Oberon and also in the Verilog source, but assume it should be somewhere in the .xcd-File too?
- Mon Apr 29, 2024 9:04 am
- Forum: Astrobe for FPGA RISC5
- Topic: Additional switches not detected on Nexys A7 board
- Replies: 2
- Views: 56101
Re: Additional switches not detected on Nexys A7 board
Dear Astrobe Support, thank you very much for your educational approach of sustainable support. Took your advice to heart and tried the extension of the hardware configuration ... with success: after a first dive into verilog syntax, i could activate the additional 8 LEDs as well as the fitht button...