Search found 60 matches

by gray
Tue Feb 26, 2019 12:55 pm
Forum: Astrobe for ARM Cortex-M3, M4 and M7
Topic: Editor/IDE Questions
Replies: 3
Views: 3781

Editor/IDE Questions

Is there a possibility to make the Astrobe editor "listen" to changes made to open files made with another editor, or a "reload" function without closing and reloading the file? The keyboard shortcuts cannot be changed, right? Can I prevent the terminal window from scrolling to the bottom whenever ...
by gray
Wed Feb 20, 2019 9:25 am
Forum: Cortex-M3
Topic: ISR Use of Registers; Privileged Mode?
Replies: 5
Views: 4288

Re: ISR Use of Registers; Privileged Mode?

And you don't mark the exception handlers in Traps.mod with square brackets because it does not matter, as you never return to the interrupted code anyway? Sorry for all the nagging, I would like to understand all this... In the same vein -- the nagging and trying to understand :| -- another questio...
by gray
Tue Feb 19, 2019 2:09 pm
Forum: Astrobe for ARM Cortex-M3, M4 and M7
Topic: user traps
Replies: 7
Views: 7951

Re: user traps

ad 1.) true, that's a bad idea. It would result in a Hard fault. The ASSERT needs to be in SVCall: PROCEDURE SVCall*(h: PROCEDURE); VAR currentHandler: PROCEDURE; BEGIN ASSERT(h # NIL, 100); sysHandler := h; ... ad 2.) as sysHandler runs as exception handler, it will result in a Hard fault. But that...
by gray
Tue Feb 19, 2019 1:41 pm
Forum: Cortex-M3
Topic: ISR Use of Registers; Privileged Mode?
Replies: 5
Views: 4288

Re: ISR Use of Registers; Privileged Mode?

When an interrupt handler is invoked any additional registers that need to be saved are automatically saved. Just to be sure: so all exception handlers, not only ISRs (eg. a handler for the SVC call/exception), need to be marked with the square-bracketed integer, like 'PROCEDURE handler[0]', so the...
by gray
Tue Feb 19, 2019 3:09 am
Forum: Cortex-M3
Topic: ISR Use of Registers; Privileged Mode?
Replies: 5
Views: 4288

ISR Use of Registers; Privileged Mode?

Two questions: With an interrupt, only R0 to R3 [1] are pushed onto the stack upon entry of the ISR. Does the compiler automatically account for this limitation when compiling ISRs, or is there anything I need to take care of manually? Does all thread mode (ie. not handler) code run privileged? Is t...
by gray
Mon Feb 18, 2019 10:12 am
Forum: Astrobe for ARM Cortex-M3, M4 and M7
Topic: user traps
Replies: 7
Views: 7951

Re: user traps

Here's a version that works without changing Traps.mod, using the vector swapping technique (relevant excerpt from my Kernel.mod module, leaving out the SysTick business). CONST ... SVC_Instruction = 0DF00H; SVC_Vector = 02CH; VAR ... sysHandler: PROCEDURE; svcTrapAddr: INTEGER; PROCEDURE svcHandler...
by gray
Mon Feb 18, 2019 9:26 am
Forum: Astrobe for ARM Cortex-M3, M4 and M7
Topic: user traps
Replies: 7
Views: 7951

Re: user traps

I want to use the SVC call/mechanism not only for error handling, but also executing code that is safe from interference by interrupt service routines (ISR), eg. to avoid race conditions. Thusly executed code must be small and fast for the least possible interference with the incoming interrupts. As...
by gray
Wed Feb 13, 2019 4:22 am
Forum: Cortex-M3
Topic: Call Stack
Replies: 3
Views: 3470

Re: Call Stack

IMO, that would be a great addition to the debugging toolbox. The location of an error is a good start and mostly helpful for modules of your main controller-logic, but for library modules that are used from different locations, to know what calls lead to an error is crucial. I am also confident tha...
by gray
Tue Feb 12, 2019 7:30 am
Forum: Cortex-M3
Topic: Call Stack
Replies: 3
Views: 3470

Call Stack

If a run-time error occurs, or a user-trap is triggered, is it possible to get (print, or create/retrieve a data structure such as a linked list) the call stack, ie. the chain of procedure calls that resulted in the trap? Thanks.
by gray
Tue Feb 12, 2019 3:48 am
Forum: Cortex-M3
Topic: M3-v7.0 -- Error in example Info.mod
Replies: 1
Views: 2394

M3-v7.0 -- Error in example Info.mod

Just a quick note, valid for v7.0 of the M3 environment: 'Info.mod' (in the General examples folder) does not compile, as it refers to 'MCU.CCLK' and 'MCU.PCLK', neither of which is defined for the STM32 boards. The two items are declared for the LPC boards, hence the example compiles, but are only ...