Astrobe Forum

A big thank you to gray for documenting this process. Creating a new boot file for Embedded Oberon has now got a whole lot easier with the new Link command in v8.0 Astrobe for RISC5. The new process is this: 1. Update the core modules (FileDir, Kernel, Files and Modules) with your changes as require...

v8.0 Astrobe for RISC5 has now been released. Developers can use Astrobe on Windows to edit and compile real-time Oberon applications. These can then be uploaded and executed on a minimal embedded version of the Project Oberon OS running on an FPGA board. A summary of the new features included in th...

Yes - you can program the STM32F746 through the SWD interface directly from the Astrobe IDE using the ST-LINK CLI. This was the sort of capability that we had in mind when we designed the user-configurable Tools menu. Edit your AstrobeM3-v7.2\Configs\Tools.ini file and add the following lines or som...

This story has a happy ending as reported by Pablo on the ETH Oberon mailing list

http://lists.inf.ethz.ch/pipermail/oberon/2021/015888.html

Free should be used with great care and only when necessary. A situation where it is necessary and generally OK is when you are in the process of developing a new module and want to test it after making changes and recompiling. In that case you should have a good understanding of how the module work...

Great! I'm pleased to hear that you have got it working. I'll add a note to the installation instructions to point out that the folder structure should be maintained when unzipping the Verilog files. We deliberately use the same folder structure as the official Project Oberon release. Is that why yo...

Thank you for the additional information. We used to supply the MCS files with the bitstream file but discovered that not only are these different for different boards, but also between different revisions of the same board :( Anbody else reading this should note the following: You need to refer to ...

(To minimise any confusion I've created this new topic and moved the original message from the Arty A7-100 topic.) We do not have the older Nexys 4 Rev B board so we are unable to test Project Oberon Workstation on it. However, it appears to similar enough to the Nexys A7-100T (which we are able to ...

Make sure that you are only using the files supplied for Embedded Project Oberon if you are using the constraints file you attached here. These files must not be mixed with the files supplied for Project Oberon Workstation. The Embedded Project Oberon BootLoader ROM file is called prom.mem. You shou...

To help new users get started we have now made available, free of charge, a disk image, Verilog sources and bitstream file specifically to run the Project Oberon Workstation on the Digilent Arty A7-100T FPGA development board and associated Pmod modules 'out-of-the-box'. This release is based on the...