Search found 102 matches

by gray
Sat Apr 13, 2019 4:17 am
Forum: Astrobe for ARM Cortex-M0, M3, M4 and M7
Topic: Extended Type Formal VAR Parameters
Replies: 5
Views: 27032

Extended Type Formal VAR Parameters

MODULE M; TYPE T1 = POINTER TO T1Desc; T1Desc = RECORD END; T2 = POINTER TO T2Desc; T2Desc = RECORD(T1Desc) END; VAR t1: T1; t2: T2; PROCEDURE P1(t: T1); END P1; PROCEDURE P2(VAR t: T1); END P2; BEGIN t1 := t2; P1(t2); P2(t2) (* does not compile *) END M. I am not sure why the compiler rejects the ...
by gray
Fri Apr 12, 2019 1:57 pm
Forum: Astrobe for ARM Cortex-M0, M3, M4 and M7
Topic: Type Extensions Across Modules
Replies: 5
Views: 32283

Re: Type Extensions Across Modules

Oh, that's a bit disappointing. In my book, being able to extend a base type without the need to change this base type scores high. Again, is this a limitation of the language or the compiler? Here's a loosely related follow-up issue I ran into today: MODULE M1; TYPE T1 = POINTER TO T1Desc; T1Desc =...
by gray
Fri Apr 12, 2019 2:56 am
Forum: Astrobe for ARM Cortex-M0, M3, M4 and M7
Topic: Type Extensions Across Modules
Replies: 5
Views: 32283

Type Extensions Across Modules

Let's assume we have this module as starting point: MODULE M1; TYPE T1* = POINTER TO T1Desc; T1Desc* = RECORD i: INTEGER END; PROCEDURE P1*(t: T1); END P1; PROCEDURE Init*(t: T1); BEGIN t.i := 13 END Init; END M1. Now I want to extend the type as follows: MODULE M2; IMPORT M1; TYPE T2* = POINTER TO ...
by gray
Wed Mar 27, 2019 12:32 pm
Forum: Astrobe for ARM Cortex-M0, M3, M4 and M7
Topic: NEW(): ASSERT vs. Returning NIL
Replies: 3
Views: 20322

Re: NEW(): ASSERT vs. Returning NIL

Is NIL represented as 0 (zero), ie. does 'returning NIL' mean assigning zero to 'p' in Storage.Allocate()? (That's what I would infer from Storage.Deallocate().)
by gray
Wed Mar 27, 2019 3:57 am
Forum: Astrobe for ARM Cortex-M0, M3, M4 and M7
Topic: NEW(): ASSERT vs. Returning NIL
Replies: 3
Views: 20322

NEW(): ASSERT vs. Returning NIL

The Oberon Report (2016) states for NEW(): "Failure of allocation results in p obtaining the value NIL." (6.4 Pointer Types). Storage.Allocate() has an ASSERT to check for heap overflow (which halts execution as per the standard Error module). Is Storage.Allocate() an exact representation of the com...
by gray
Wed Mar 13, 2019 11:49 am
Forum: Astrobe for ARM Cortex-M0, M3, M4 and M7
Topic: Stack Frames
Replies: 3
Views: 19028

Re: Stack Frames

But I could write this, right? PROCEDURE NMITrap[0]; VAR trapAddr: INTEGER; BEGIN SYSTEM.GET(SYSTEM.SP + 68, trapAddr); ... Note the [0] and changed SP-offset, as on entry to a normal interrupt handler you also save the other eight registers R4 to R11, I think. I want to use this with SVCTrap to all...
by gray
Wed Mar 13, 2019 10:51 am
Forum: Astrobe for ARM Cortex-M0, M3, M4 and M7
Topic: Stack Frames
Replies: 3
Views: 19028

Stack Frames

I try to figure out the structure of the stack frame for exception handlers (STM32F207 target, or M3 in general, I guess). The programming manual explains the "stacking", but is not specific regarding the order the listed items are put on the stack: R0-R3, return address, PSR, LR. Based on the code ...
by gray
Tue Mar 12, 2019 12:45 am
Forum: Astrobe for ARM Cortex-M0, M3, M4 and M7
Topic: Storage.mod Question
Replies: 4
Views: 21808

Re: Storage.mod Question

Thanks.
cfbsoftware wrote: P.S. I had to remove your modules.zip attachment as it contained a significant amount of source code which can only be shared with other Astrobe Personal and Professional users.
Oops. Sorry about that.
by gray
Mon Mar 11, 2019 1:12 pm
Forum: Astrobe for ARM Cortex-M0, M3, M4 and M7
Topic: Storage.mod Question
Replies: 4
Views: 21808

Re: Storage.mod Question

1. No, I have not modified Storage.mod. 2. The config is the stock one, aside from the library search paths. 3. When I run your program with the stock Main.mod, I get the same memory values as you. 4. However, I use a slightly modified Main.mod, as well as a modified Serial.mod (Serial2.mod, allowin...
by gray
Mon Mar 11, 2019 9:39 am
Forum: Astrobe for ARM Cortex-M0, M3, M4 and M7
Topic: Storage.mod Question
Replies: 4
Views: 21808

Storage.mod Question

I am baffled by the following behaviour (Cortex M3, STM32F207 target). Here's a minimal test case, condensed and abstracted from my actual code. MODULE testalloc; IMPORT Main, Out; TYPE P = POINTER TO Pdesc; Pdesc = RECORD i: INTEGER END; VAR p: P; BEGIN NEW(p); p.i := 13; Out.Int(p.i, 0); Out.Ln EN...