FPGA Oberon Article in Xilinx Xcell Journal (Issue 91)

General discussions about using the Astrobe IDE to program the FPGA RISC5 cpu used in Project Oberon 2013
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cfbsoftware
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FPGA Oberon Article in Xilinx Xcell Journal (Issue 91)

Post by cfbsoftware » Sat May 23, 2015 4:32 am

Niklaus Wirth's article Oberon System Implemented on a Low-Cost FPGA Board including an overview of Lola, his Oberon-like hardware description language (HDL) is featured in this month's issue of Xilinx's Xcell Journal (Issue 91). You can download a pdf copy.

Watch out for Astrobe developments related to the FPGA Project Oberon system described in this article...

captbill
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Re: FPGA Oberon Article in Xilinx Xcell Journal (Issue 91)

Post by captbill » Thu Jul 02, 2015 11:55 pm

Hi Chris,
Anything exciting happening with the FPGA lately?

Thanks

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Re: FPGA Oberon Article in Xilinx Xcell Journal (Issue 91)

Post by cfbsoftware » Fri Jul 03, 2015 1:00 pm

Yes - work is progressing well. We have ported the FPGA RISC5 Oberon compiler to Windows and integrated it into an experimental version of Astrobe to use as a cross-compiler. We were able to successfully execute a simple RISC5 Oberon application it generated for the first time today after we uploaded the object (.rsc) file to the Project Oberon 2013 system.

The aim of this work is to create a version of Astrobe that developers can use to edit and compile, embedded real-time Oberon applications on Windows which they can then upload and execute on FPGA RISC5 development boards which have similar capabilities to the development boards currently targeted by Astrobe.

captbill
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Re: FPGA Oberon Article in Xilinx Xcell Journal (Issue 91)

Post by captbill » Fri Jul 03, 2015 9:25 pm

Wonderful!
So let me get this strait: your goal is to be able to create "programs" which are based on the current "targets" available in Astrobe to "flash" to the ProjectOberon OS on the FPGA? Or does it create the whole flashable .bin file? That is interesting...and what timing! I have been trying to convince the ESP8266 crowd of the virtues of Astrobe Oberon, trying to drum up some support in the community to create an Oberon target compiler for the esp8266.

I am really looking forward to seeing a target in the micro-mcu category, like the Teensy, Trinket, attiny and many others popping up all the time. Currently people are programming these little things with Arduino IDE's and massive C++ tools, and all just to end up with code that is 10-15 time the size of what Astrobe produces. I think Astrobe could easily be the ultimate IDE for this "tiny mcu" category, which is really taking off it seems. If one is able to install Astrobe, open the blink.mod, compile and flash the ESP8266 (or whatever target) all in ten minutes (including download time), you would never look back. The whole crowds jaws will drop.

Also, developing the targets for these mini-mcu's should be quite simple, I would imagine, since they are so minimalist. Certainly these chips will be a welcome pairing with Oberon's minimalist approach. I would assume, with the fast evolving developments in this new 'IoT' field, the ability to keep up with new targets as they appear will be a must too. Astrobe will certainly have a leg up on this one, I would have to assume. I mean, the MCU.mod for the LPC1769 is only @700 lines of mostly registry mapping, looks like. How hard could one of the miniature mcu's be?

I just yesterday posted a thread at ESP8266.com forum about Astrobe. It would be great if you could stop by and join the discussion.
http://www.esp8266.com/viewtopic.php?f=9&t=3861

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Re: FPGA Oberon Article in Xilinx Xcell Journal (Issue 91)

Post by cfbsoftware » Sat Jul 04, 2015 2:05 am

captbill wrote:... your goal is to be able to create "programs" which are based on the current "targets" available in Astrobe to "flash" to the ProjectOberon OS on the FPGA? Or does it create the whole flashable .bin file?
The initial implementation will only need a minimal version of the Project Oberon OS e.g. the Kernel, loader, filesystem, SPI, RS232, SD card support etc. The higher-level layers of the OS with the user-interaction features e.g. GUI, display, VGA, mouse, keyboard, compiler, editor etc will not be required.

Only the object file of the application (and any custom library modules that it required) would need to be uploaded. The Oberon OS loader automatically dynamically loads and links any modules that are not already in RAM when you execute a command from the object file.
... to create an Oberon target compiler for the esp8266.
The esp8266 is something else altogether. It uses a Tensilica CPU which is not an FPGA - it has its own proprietary instruction set.

FPGA Oberon could be used immediately with boards that use the Xilinx Spartan devices which currently support Project Oberon (e.g. Digilent Spartan-3 and Saanlima Pippistrello) and potentially with simpler Spartan-based boards like Gadget Factory's Papilio and Numato Lab's Mimas V2. I anticipate that the reduced requirements will make it easier to port the minimal OS to a wider range of targets than is currently feasible for the full Project Oberon system.
I am really looking forward to seeing a target in the micro-mcu category, like the Teensy
No need to wait - Astrobe currently supports the EzSBC2 which has a similar footprint and capabilities as the Teensy.

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Re: FPGA Oberon Article in Xilinx Xcell Journal (Issue 91)

Post by captbill » Sat Jul 04, 2015 3:57 am

The initial implementation will only need a minimal version of the Project Oberon OS e.g. the Kernel, loader, filesystem, SPI, RS232, SD card support etc. The higher-level layers of the OS with the user-interaction features e.g. GUI, display, VGA, mouse, keyboard, compiler, editor etc will not be required.
So essentially, RISC0 as a 'soft processor' where you have implemented a way to upload executables to a ram section, would you say? Is it a traditional 'soft processor' like the Zpuino or MicroBlaze? This is just what is needed. I really think this will greatly expand the appeal, being able to accommodate any standard FPGA (bypassing the SRAM issue).
The esp8266 is something else altogether. It uses a Tensilica CPU which is not an FPGA - it has its own proprietary instruction set.
Yes, I got off topic a bit. I was suggesting a Tensilica mcu target for Astrobe, like you have done with the EzSBC (LPC1347). My main reasoning is the Tensilica chip/OS is quite powerful, and in fact, DOES have FPGA functionality. It has a Verilog-like language called TIE that can indeed give it FPGA functionality, albeit proprietary/non-standard HDL. Most importantly, is the built in Wifi of the Tensilica. It is this chip that is driving the whole 'InternetOfThings' that's becoming more and more popular.

I just spent the last two days stuck in 'dependency hell' trying to install an Eclipse base dev tool chain called Sming for this little chip. Swore after tasting of Astrobe I would never mess with the Arduino IDE again but it's the appeal of the ESP8266 that cannot be ignored. I have this thing flashing 'over the air'. If you could deliver an IDE that can be setup and flashing Blink.mod in under ten minutes, including download time, and producing only 136 bytes of code, you would blow their mind.

Of coarse, deciding which chips deserve the effort that goes into making a target is important. Who knows which ones will be around tomorrow? That said, the Tensilica looks like a serious chip that should be around some time. I am hoping to develop some interest among the community and get some interest in Astrobe going. Hopefully someone will see the great potential of this arrangement.
No need to wait - Astrobe currently supports the EzSBC2 which has a similar footprint and capabilities as the Teensy
Yes, I have the EzSBC2. It looks to be in the same 'weight class' as the Tensilica minus the WiFi capabilities. Perhaps you are not aware that there are versions of the ESP8266 that have many more pins available, making them full blown mcu's like the EzSBC2.

Cheers

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Re: FPGA Oberon Article in Xilinx Xcell Journal (Issue 91)

Post by cfbsoftware » Sat Jul 04, 2015 4:58 am

captbill wrote:So essentially, RISC0 as a 'soft processor' where you have implemented a way to upload executables to a ram section, would you say? Is it a traditional 'soft processor' like the Zpuino or MicroBlaze?
Yes - except that Project Oberon is implemented on the more advanced RISC5 'soft processor' rather than the RISC0. To see the differences refer to the Project Oberon, 2013 Edition and RISC: FPGA-related Work documentation which you can download from:

http://www.inf.ethz.ch/personal/wirth/

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