Search found 417 matches

by cfbsoftware
Fri Jun 07, 2019 12:46 pm
Forum: Astrobe for ARM Cortex-M3, M4 and M7
Topic: Startup Sequence
Replies: 1
Views: 3177

Re: Startup Sequence

Yes. The initialisation section (i.e. any code between BEGIN and END at the end of a module) of each Module is executed in turn in the order as listed in the map file. The initialisation section of the main module of the application (the one that imports Main) is the last to be executed. This usuall...
by cfbsoftware
Sat May 25, 2019 5:19 am
Forum: Astrobe for ARM Cortex-M3, M4 and M7
Topic: Initialisation of Pointer Variables
Replies: 2
Views: 3691

Re: Initialisation of Pointer Variables

The implementation effort (and subsequent runtime overheads) required for such are scheme are not insignificant. Keep in mind that pointers can exist as global variables, local variables, register variables, fields of records, dynamic lists and elements of arrays (both global and local). The locatio...
by cfbsoftware
Sun May 19, 2019 5:03 am
Forum: Astrobe for ARM Cortex-M3, M4 and M7
Topic: push {}
Replies: 20
Views: 18690

Re: push {}

Nice work! Read up on how the Frame Pointer is used by the Oberon compiler to check if there are any flaws or hidden issues. This is detailed in An Oberon Compiler for the ARM Processor which you can download from the Oberon page on Niklaus Wirth's website. The odd addresses are explained in Section...
by cfbsoftware
Thu May 16, 2019 11:20 am
Forum: Astrobe for ARM Cortex-M3, M4 and M7
Topic: push {}
Replies: 20
Views: 18690

Re: push {}

Thank you for your request. It is already one of the features on our list of prospective enhancements. In the meantime, if you require this information to assist with diagnosing runtime errors, refer to Section 4.5 Diagnosing System Exceptions in the Oberon for Cortex-M documents. Given the followin...
by cfbsoftware
Tue May 14, 2019 11:34 am
Forum: Astrobe for ARM Cortex-M3, M4 and M7
Topic: push {}
Replies: 20
Views: 18690

Re: push {}

The disassembler generates the listing 'on the fly' as each instruction is generated. There are a few situations (this is one of them) where the instruction that is created initially is just a placeholder which is patched retrospectively. Push only needs to save the registers that are used but that ...
by cfbsoftware
Sat May 11, 2019 4:58 am
Forum: Astrobe for ARM Cortex-M3, M4 and M7
Topic: Type Test Inconsistency?
Replies: 5
Views: 5668

Re: Type Test Inconsistency?

The value parameter that is passed to P1 is p, not p.t.

p is pointer. It is not a structured variable, so it is not read-only when it is passed as a value parameter. However, any changes to the value of p (not what it points to) only affect the local copy of the pointer.
by cfbsoftware
Fri May 10, 2019 12:51 pm
Forum: Astrobe for ARM Cortex-M3, M4 and M7
Topic: Adjustable Buffers, Number and Sizes
Replies: 2
Views: 3631

Re: Adjustable Buffers, Number and Sizes

I am not aware of any better solution. Option 2 is the way I would go. However, I would prefer to be consistent and always have a configuration module in the folder of the main module and not bother with a default config module. Then I could be sure which one is being used and be reminded if I forgo...
by cfbsoftware
Sat May 04, 2019 5:23 am
Forum: Astrobe for ARM Cortex-M3, M4 and M7
Topic: Type Test Inconsistency?
Replies: 5
Views: 5668

Re: Type Test Inconsistency?

There is nothing wrong with procedure P2 in either example. I strongly recommend that you use pointers throughout to minimise confusion, but if you have a compelling reason to pass record elements around as in your example, and want to get your expected result, then you should make the pointer to PI...
by cfbsoftware
Fri May 03, 2019 11:30 pm
Forum: Astrobe for ARM Cortex-M3, M4 and M7
Topic: Type Test Inconsistency?
Replies: 5
Views: 5668

Re: Type Test Inconsistency?

I suspect that this example is an attempt to circumvent the rule that does not allow type tests on expressions e.g. the following is invalid where p is a record: CASE p.t OF T1: t.k := 4; Out.String("T1"); Out.Ln; END In this context p.t is an expression not a qualified identifier. If you want to im...
by cfbsoftware
Tue Apr 30, 2019 11:35 am
Forum: Astrobe for ARM Cortex-M3, M4 and M7
Topic: 7.0.1 Fixes
Replies: 1
Views: 3083

Re: 7.0.1 Fixes

1. The same rules apply to type tests in Leaf procedures as for type tests in normal procedures and vice versa. 2. Refer to the syntax definitions in the Appendix The Syntax of Oberon in the Oberon Language Report. ^ is defined as a selector. This can be traced all the way back to an expression. A q...