Astrobe Forum

Thank you for your report. The error occurs because the SEV instruction happens to be a "related encoding" variant of the ARMv7-M IT instruction which is not yet recognised by the Astrobe disassemblers. The WFE, WFI, and YIELD instructions behave similarly. This problem will be fixed in the next rel...

Thank you for your report. The RP2040 clock initialisation statement: CONST (* XOSC_STATUS *) STABLE = 31; ... REPEAT UNTIL SYSTEM.BIT(MCU.XOSC_STATUS, STABLE); Should generate code that looks something like this: . 30 01EH 04803H ldr r0,[pc,#12] -> 44 . 32 020H 06801H ldr r1,[r0] . 34 022H 00009H m...

All known problems, including those reported here to date, have now been addressed in v9.0.4 Astrobe for Cortex-M3, M4 and M7. Corresponding updates for Astrobe for Cortex-M0 should be released sometime after the Xmas break. A summary of the problems fixed is included in: What's New in Astrobe for C...

But non-VAR parameters? I would have expected to get a stack address, but for RECORDs and ARRAYs we get the actual address, VAR or not VAR. This is a subtle consequence of Section 10.1 of the Oberon-07 Language Report: A value parameter corresponds to an actual parameter that is an expression, and ...

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We have discovered some reliability issues while running regression tests on v9.0.4 Astrobe for Cortex-M3, M4 and M7. These are related to the SYSTEM.LNK problem . A number of the instructions generated e.g. TEQ, TST, CMP etc. are documented as, for example: if n == 15 || m IN {13,15} then UNPREDICT...

We are planning on removing the hard-coded value and replacing it as follows: IF heapLimit = 0 THEN stackLimit := heapLimit ELSE stackLimit := LinkOptions.DataStart + 0200H END; This allows the Stack to use all of the remaining contiguous RAM after the Global Data and Interrupt Vectors (including so...

Investigations so far indicate that the problem applies to: a) SYSTEM.SP and SYSTEM.PC as well as SYSTEM.LNK b) Built-in functions other than BITS e.g. SYSTEM.VAL, ODD etc. etc. c) It is only a problem in Astrobe for Cortex-M0, and does not occur in Astrobe for Cortex-M3, M4 and M7. We will aim to h...

That is a documentation error that we will fix - thank you for pointing it out. The restriction only applies to the MAU module (as documented there) not the Storage module.

The code that you referenced is now obsolete and can be removed. It was documented as follows in an example called ExtraRAM: Illustrates the use of the additional 2kB blocks of SRAM1 and USB RAM present on LPC134x MCUs with a total of 10kB or more of SRAM Run the program twice - once using the defau...