Search found 108 matches
- Thu Oct 28, 2021 5:21 am
- Forum: Astrobe for FPGA RISC5
- Topic: System.Date (v8.0)
- Replies: 1
- Views: 8102
Re: System.Date (v8.0)
Checking for the correctness of the date and time actually set is also useful as we actually can set the clock even with incorrect parameters. Here are two example cases with incorrect parameters where the clock gets set nonetheless. Typos happen. :( System.Date 28 10 n21 10 20 30 System.Date 28 10 ...
- Mon Oct 25, 2021 9:19 am
- Forum: Astrobe for FPGA RISC5
- Topic: System.Date (v8.0)
- Replies: 1
- Views: 8102
System.Date (v8.0)
The new System.Date procedure in v8.0: PROCEDURE Date*; (* ... *) BEGIN (* ... *) IF S.class = Texts.Int THEN (*set clock*) (* ... *) IF (day >= 1) & (day <= 31) & (mo >= 1) & (mo <= 12) & (yr >= 0) & (yr <= 63) THEN dt := ((((yr*16 + mo)*32 + day)*32 + hr)*64 + min)*64 + sec; Kernel.SetClock(dt) EN...
- Mon Oct 25, 2021 8:31 am
- Forum: Astrobe for FPGA RISC5
- Topic: ASSERT & Error.Mod (version 8.0)
- Replies: 1
- Views: 8008
ASSERT & Error.Mod (version 8.0)
Astrobe for RISC v8.0 provides a new module Error.Mod. It is used, for example, in Math.Mod: PROCEDURE Sqrt*(x: REAL): REAL; (* ... *) BEGIN ASSERT(x >= 0.0, Error.input); (* ... *) END Sqrt; That is, to provide an error code for ASSERT via a second parameter (which could be any integer value, does ...
- Wed Jun 02, 2021 4:28 am
- Forum: Astrobe for FPGA RISC5
- Topic: Self-unloading With Modules.Free?
- Replies: 2
- Views: 11010
Re: Self-unloading With Modules.Free?
Thanks for your information and insights. Your general words of caution are useful in any case, as in case "self-freeing" would not work, the unloading could easily be delegated to an extended loader process/task that would free the first program before loading the subsequent one. My current design ...
- Tue Jun 01, 2021 9:23 am
- Forum: Astrobe for FPGA RISC5
- Topic: Self-unloading With Modules.Free?
- Replies: 2
- Views: 11010
Self-unloading With Modules.Free?
Is there any reason why, or a situation when, this would not work? MODULE M; IMPORT Modules, Oberon; PROCEDURE Run*; BEGIN Modules.Free("M"); Oberon.Collect(0) END Run; END M. That is, a module unloading itself. The reasoning here is that Modules.Free just sets the module name to the empty string, a...
- Mon May 03, 2021 6:54 am
- Forum: Astrobe for FPGA RISC5
- Topic: SYSTEM.PUT Transfer Width
- Replies: 0
- Views: 19620
SYSTEM.PUT Transfer Width
With the Astrobe compiler, SYSTEM.PUT(adr, val) transfers either eight or 32 bits, depending on the type of 'val'. But what if 'val' is an expression? I had this procedure interfacing a device in the FPGA hardware. PROCEDURE SetSignal*(dev: INTEGER; sig: BYTE); BEGIN SYSTEM.PUT(Adr, LSL(sig, DataShi...
- Sat Apr 17, 2021 6:48 am
- Forum: Astrobe for FPGA RISC5
- Topic: Configurable Stack Size
- Replies: 0
- Views: 19608
Configurable Stack Size
As mentioned in here , my first real use of creating my own boot file was to make the stack size configurable. To tie up that loose end, here's how. It should basically apply to Project Oberon as well, but I'll focus on Embedded Oberon. The stack size is hard-coded to 32 kB (8000H) in two places. Ke...
- Wed Apr 14, 2021 11:16 am
- Forum: Astrobe for FPGA RISC5
- Topic: Creating Boot Files for EO with Astrobe for RISC5
- Replies: 1
- Views: 10235
Creating Boot Files for EO with Astrobe for RISC5
The following applies to Embedded Oberon, running on an FPGA board, using an SD card for storage. To venture into making changes to the inner core of the Embedded Oberon (EO) system, that is, modifying modules Files, FileDir, Modules, or Kernel, it's necessary to create a new boot file to reflect th...
- Wed Apr 14, 2021 12:51 am
- Forum: Astrobe for FPGA RISC5
- Topic: Tools for backing up a Project Oberon SD card image
- Replies: 1
- Views: 9850
Re: Tools for backing up a Project Oberon SD card image
I also use Win32 Disk Imager and the 'dd' command line tool. Here's my backup approach. I use Disk Imager to initially create an SD card to boot Embedded Oberon, using the disk image as downloaded from the Astrobe website, eg. 'Embedded200812.img'. Thereafter, I have an SD card with a 256 MB FAT par...
- Sat Apr 10, 2021 2:26 am
- Forum: Astrobe for FPGA RISC5
- Topic: Why are the SPI MISO and SCLK signals shorted together?
- Replies: 2
- Views: 11811
Re: Why are the SPI MISO and SCLK signals shorted together?
I think we should differentiate between the SPI device itself, and SPI-connected devices, for lack of a better term. The SPI device is implemented in the FPGA, the SPI-connected devices are, well, connected to this SPI device. The SD card is an SPI-connected device, as is the RTC if installed. Using...