General discussions about using the Astrobe IDE to program the FPGA RISC5 cpu used in Project Oberon 2013
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- Joined: Tue Mar 09, 2021 8:16 pm
I see in RAM.v that 3 blocks of BRAM are instantiated for a total of ~48k words. Since the `adr` signal is 16bit and can theoretically address up to ~65k words, what happens if I pass in an address beyond 48K?
If I've done my math correctly, that means that any addresses 0xBFFF would be out of range? Is there a condition to handle this scenario? (We're looking to reserve sections on the address bus for our application, so I'm wondering if I can reserve these addresses without disrupting the RAM operation)
Code: Select all
wire [31:0] do [0:2]; //3 32bit wires, one for each block
// select RAM block using the 2 MSB in the address
// does this mean that '11' is out of range? because there are only
// 3 memory blocks?
// '00' --> block0
// '01' --> block1
// '10' --> block2
// what happens with '11' since there are only 3 blocks?
rdata = do[adr[15:14]];
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Memory addressing limits are defined in Bootload.Mod. For the Artix-7 XC7A35T, using 192KB BRAM, MemLim is defined as 030000H. Read Section 8 Storage layout and management in the Project Oberon documentation (Astrobe menu > Help > Project Oberon) to see how the address range is partitioned and managed by Oberon.