FPGA targets

General discussions about using the Astrobe IDE to program the FPGA RISC5 cpu used in Project Oberon 2013
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cfbsoftware
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FPGA targets

Post by cfbsoftware » Sun Jul 26, 2015 1:36 pm

captbill wrote: Will your soft processor fit on this chip?

ICE40UL1K-SWG16ITR50
LABc/CLBs 156
Logic elements 1248
Ram 57344
I/O 10
Unless you are capable of porting the Project Oberon Verilog code to different targets yourself you should only consider development boards which use FPGA devices which have already been demonstrated to support Project Oberon 2013 i.e. Xilinx's Spartan 3 and Spartan 6 devices.

Alexander Shiryaev
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Re: FPGA targets

Post by Alexander Shiryaev » Mon Oct 05, 2015 11:00 am

What is RISC5 core clock frequency on Spartan-6 FPGA?

cfbsoftware
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Re: FPGA targets

Post by cfbsoftware » Mon Oct 05, 2015 12:38 pm

We are currently running it at the same clock frequency as the Spartan-3 i.e. 25 MHz.

e2ko5
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Re: FPGA targets

Post by e2ko5 » Fri Dec 04, 2015 2:05 pm

Is there any "porting guide", which explains how to port it to a new/other FPGA board?

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cfbsoftware
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Re: FPGA targets

Post by cfbsoftware » Fri Dec 04, 2015 10:53 pm

All the information you should need to port the system to another FPGA board is on the Project Oberon website. In particular, chapters 16-7 of the Project Oberon book and the Verilog source code for the Digilent and OberonStation Spartan 3 boards.

The Verilog sources for Saanlima's Pippistrello Spartan 6 board are also available. Presumably you will have to know more about the particular device on the board you want to port it to if it uses an FPGA device which isn't part of the Xilinx Spartan 3 or Spartan 6 families.

cfbsoftware
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Re: FPGA targets

Post by cfbsoftware » Thu Oct 06, 2016 11:45 pm

cfbsoftware wrote:We are currently running it at the same clock frequency as the Spartan-3 i.e. 25 MHz.
The latest implementation of Embedded Project Oberon which targets sub-$100 FPGA development boards based on the Xilinx Artix-7 family of FPGA devices runs at 50 MHz.

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