New Project Oberon disk image for the Pepino LX9

General discussions about using the Astrobe IDE to program the FPGA RISC5 cpu used in Project Oberon 2013
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New Project Oberon disk image for the Pepino LX9

Post by cfbsoftware » Tue Jul 31, 2018 1:16 pm

To help new users get started we have now made available, free of charge, a disk image and Verilog bitstream files specifically to run the Project Oberon Workstation on the Pepino LX9 FPGA development board 'out-of-the-box'.

This release is based on the Oberon sources (as at July 2018) and Verilog sources (as at Jun 2018) as described in An Update of the RISC5 Implementation, by Niklaus Wirth 15.6.2018.

The system also includes our enhancements:
  • Support for Numeric / Character CASE statements in the compiler
  • Optional real-time clock devices
  • Timestamps on uploaded files
  • The additional high-capacity file system HCFiler
  • Additional source code examples
The entire source code of the system, including the compiler, is included on the disk image. Go to for more details and to request a copy of the system.

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