External Interrupt3 of LPC1769

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anitasure123
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Joined: Tue Jul 21, 2015 6:49 am

External Interrupt3 of LPC1769

Post by anitasure123 » Wed Feb 17, 2016 6:47 am

Hi,
i developed an application using lpc1769 which should perform as:
1) When detects rising edge interrupt on P2.11, Its ISR is executed.
ISR includes :
1) Disable this interrupt.
2) if GPIO pin(P2.0) was at low making it high(vice-versa) for 80ms and re-enabling the interrupt. so steps 1 to 2 continue.

so my output is for every rising edge of input pulse at P2.11, there is pulse on P2.0 having positive and negative period equal to 80ms. find the attached waveforms. But I am getting the output as, after 80ms once i re-enable the interrupt, irrespective of edge Interrupt is served immediately. I am not understanding this behaviour of interrupt.

Please reply
Thanks and Regards
Anita
Attachments
pulse.JPG
1st waveform is input on P2.11 and 2nd waveform is output on GPIO pin P2.0
pulse.JPG (13.26 KiB) Viewed 13316 times

cfbsoftware
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Re: External Interrupt3 of LPC1769

Post by cfbsoftware » Thu Feb 18, 2016 11:09 am

Make sure you clear the interrupt before returning from the interrupt handler. Refer to the NXP LPC176x/5x User manual (UM10360) for more information.

anitasure123
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Re: External Interrupt3 of LPC1769

Post by anitasure123 » Fri Feb 19, 2016 3:49 am

Hi,
Thank you for reply. Yes I have cleared the interrupt in ISR of external interrupt. There are two methods to clear : 1) Making the interrupt pin itself not to receive the interrupt i.e by putting the zero in the bit of register GPIO Interrupt Enable for port 2 Rising Edge.(IO2IntEnr) 2) Disabling the interrupt in the NVIC itself. I tried with both methods, but still behaviour remains same.

cfbsoftware
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Re: External Interrupt3 of LPC1769

Post by cfbsoftware » Fri Feb 19, 2016 7:34 am

I thought that to clear the interrupt you had to set Bit 11 in the IO2IntClr register (Section 9.5.6.11)?

anitasure123
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Joined: Tue Jul 21, 2015 6:49 am

Re: External Interrupt3 of LPC1769

Post by anitasure123 » Fri Feb 19, 2016 9:49 am

Yes, first I cleared the bit in the IO2IntClr, (which will clear interrupt status).

cfbsoftware
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Re: External Interrupt3 of LPC1769

Post by cfbsoftware » Fri Feb 19, 2016 10:53 am

You need to set the bit in the Clear register to clear the interrupt.

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